EZ80L92MCU Datasheet, PDF (149/241 Pages) Zilog, Inc. – eZ80Acclaim Flash Microcontrollers

eZ80L92 MCU
Product Specification
134
SPI Control Register
This register is used to control and setup the serial peripheral interface. The SPI should be
disabled prior to making any changes to CPHA or CPOL. See Table 71.
Table 71. SPI Control Register (SPI_CTL = 00BAh)
Bit
7
6
5
4
3
2
1
0
Reset
0
0
0
0
0
1
0
0
CPU Access
R/W R R/W R/W R/W R/W R
R
Note: R = Read Only; R/W = Read/Write.
Bit
Position
7
IRQ_EN
6
5
SPI_EN
4
MASTER_EN
3
CPOL
2
CPHA
[1:0]
Value Description
0
SPI system interrupt is disabled.
1
SPI system interrupt is enabled.
0
Reserved.
0
SPI is disabled.
1
SPI is enabled.
0
When enabled, the SPI operates as a slave.
1
When enabled, the SPI operates as a master.
0
Master SCK pin idles in a Low (0) state.
1
Master SCK pin idles in a High (1) state.
0
SS must go High after transfer of every byte of data.
1
SS can remain Low to transfer any number of data bytes.
00 Reserved.
PS013012-1004
PRELIMINARY
Serial Peripheral Interface