EZ80L92MCU Datasheet, PDF (212/241 Pages) Zilog, Inc. – eZ80Acclaim Flash Microcontrollers

eZ80L92 MCU
Product Specification
197
Table 124. Op Code Map—Fourth Byte After 0FDh, 0CBh, and dd*
Legend
Lower Nibble of 4th Byte
Upper
Nibble
of Fourth
Byte
6
4
BIT
0,(IY+d)
Mnemonic
First Operand
Second Operand
Lower Nibble (Hex)
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
0
RLC
(IY+d)
RRC
(IY+d)
1
RL
(IY+d)
RR
(IY+d)
2
SLA
(IY+d)
SRA
(IY+d)
3
SRL
(IY+d)
4
BIT 0,
(IY+d)
BIT 1,
(IY+d)
5
BIT 2,
(IY+d)
BIT 3,
(IY+d)
6
BIT 4,
(IY+d)
BIT 5,
(IY+d)
7
BIT 6,
(IY+d)
BIT 7,
(IY+d)
8
RES 0,
(IY+d)
RES 1,
(IY+d)
9
RES 2,
(IY+d)
RES 3,
(IY+d)
A
RES 4,
(IY+d)
RES 5,
(IY+d)
B
RES 6,
(IY+d)
RES 7,
(IY+d)
C
SET 0,
(IY+d)
SET 1,
(IY+d)
D
SET 2,
(IY+d)
SET 3,
(IY+d)
E
SET 4,
(IY+d)
SET 5,
(IY+d)
F
SET 6,
(IY+d)
SET 7,
(IY+d)
Notes: d = 8-bit two’s-complement displacement.
PS013012-1004
PRELIMINARY
Op-Code Map