EZ80L92MCU Datasheet, PDF (94/241 Pages) Zilog, Inc. – eZ80Acclaim Flash Microcontrollers

eZ80L92 MCU
Product Specification
79
Table 30. PRT CONTINUOUS Mode Operation Example (Continued)
Parameter
CONTINUOUS Mode
PRT Interrupt Enabled
PRT Reload Value
Control Register(s)
TMRx_CTL[4]
TMRx_CTL[6]
{TMRx_RR_H, TMRx_RR_L}
Value
1
1
0004h
Reading the Current Count Value
The CPU is capable of reading the current count value while the timer is running. This
Read event does not affect timer operation. The High byte of the current count value is
latched during a Read of the Low byte.
Timer Interrupts
The timer interrupt flag, PRT_IRQ, is set to 1 whenever the timer reaches its end-of-count
value, 0000h, in SINGLE PASS mode, or when the timer reloads the start value in CON-
TINUOUS mode. The interrupt flag is only set when the timer reaches 0000h (or reloads)
from 0001h. The timer interrupt flag is not set to 1 when the timer is loaded with the value
0000h, which selects the maximum time-out period.
The CPU can be programmed to poll the PRT_IRQ bit for the time-out event. Alterna-
tively, an interrupt service request signal can be sent to the CPU by setting IRQ_EN to 1.
Then, when the end-of-count value, 0000h, is reached and PRT_IRQ is set to 1, an inter-
rupt service request signal is passed to the CPU. PRT_IRQ is cleared to 0 and the interrupt
service request signal is inactivated whenever the CPU reads from the timer control regis-
ters, TMRx_CTL.
Timer Input Source Selection
Timers 0–3 feature programmable input source selection. By default, the input is taken
from the eZ80L92’s system clock. Alternatively, Timers 0–3 can take their input from port
input pins PB0 (Timers 0 and 2) or PB1 (Timers 1 and 3). Timers 0–3 can also use the
Real-Time Clock clock source (50, 60, or 32768Hz) as their clock sources. When the
timer clock source is the Real-Time Clock signal, the timer decrements on the second ris-
ing edge of the system clock following the falling edge of the RTC_X_OUT pin. The input
source for these timers is set using the Timer Input Source Select register.
Event Counter
When Timers 0–3 are configured to take their inputs from port input pins PB0 and PB1,
they function as event counters. For event counting, the clock prescaler is bypassed. The
PRT counters decrement on every rising edge of the port pin. The port pins must be con-
figured as inputs. Due to the input sampling on the pins, the event input signal frequency
is limited to one-half the system clock frequency. Input sampling on the port pins results in
PS013012-1004
PRELIMINARY
Programmable Reload Timers