EZ80L92MCU Datasheet, PDF (159/241 Pages) Zilog, Inc. – eZ80Acclaim Flash Microcontrollers

eZ80L92 MCU
Product Specification
144
Table 75. I²C Master Transmit Status Codes
Code
18h
I²C State
Addr+W transmitted¹,
ACK received
MCU Response
For a 7-bit address: write
byte to DATA, clear IFLG
Next I²C Action
Transmit data byte,
receive ACK
Or set STA, clear IFLG
Transmit repeated
START
Or set STP, clear IFLG
Transmit STOP
Or set STA & STP, clear
IFLG
Transmit STOP then
START
For a 10-bit address: write
extended address byte to
DATA, clear IFLG
Transmit extended
address byte
20h
Addr+W transmitted, Same as code 18h
ACK not received
Same as code 18h
38h
Arbitration lost
Clear IFLG
Return to idle
68h
Arbitration lost,
+W received,
ACK transmitted
Or set STA, clear IFLG
Clear IFLG, AAK = 0²
Or clear IFLG, AAK = 1
Transmit START when
bus is free
Receive data byte,
transmit NACK
Receive data byte,
transmit ACK
78h
Arbitration lost,
Same as code 68h
General call addr
received, ACK
transmitted
Same as code 68h
B0h
Arbitration lost,
Write byte to DATA, clear Transmit last byte,
SLA+R received,
IFLG, clear AAK = 0
receive ACK
ACK transmitted
Or write byte to DATA, clear Transmit data byte,
IFLG, set AAK = 1
receive ACK
Notes:
1. W is defined as the Write bit; i.e., the lsb is cleared to 0.
2. AAK is defined as the I²C Acknowledge bit.
If 10-bit addressing is being used, then the status code is 18h or 20h after the first part of
a 10-bit address plus the Write bit are successfully transmitted.
After this interrupt is serviced and the second part of the 10-bit address is transmitted, the
I2C_SR register contains one of the codes in Table 76.
PS013012-1004
PRELIMINARY
I²C Serial I/O Interface