English
Language : 

EZ80L92MCU Datasheet, PDF (220/241 Pages) Zilog, Inc. – eZ80Acclaim Flash Microcontrollers
◁
eZ80L92 MCU
Product Specification
205
External Memory Read Timing
Figure 48 and Table 130 diagram the timing for external Reads.
X IN
ADDR[23:0]
DATA[7:0]
(input)
CSx
MREQ
RD
TCLK
T1
T5
T7
T9
T2
T3
T4
T6
T8
T10
Figure 48. External Memory Read Timing
Table 130. External Read Timing
Parameter Description
T1
Clock Rise to ADDR Valid Delay
T2
Clock Rise to ADDR Hold Time
T3
Input DATA Valid to Clock Rise Setup Time
T4
DATA Hold Time from Clock Rise
T5
Clock Rise to CSx Assertion Delay
T6
Clock Rise to CSx Deassertion Delay
T7
Clock Rise to MREQ Assertion Delay
20 MHz (ns)
Min.
—
2.4
1.0
2.4
3.2
2.9
2.8
Max.
10.2
—
—
—
10.3
9.7
9.6
50 MHz (ns)
Min.
—
2.4
1.0
2.4
3.2
2.9
2.8
Max.
10.2
—
—
—
10.3
9.7
9.6
PS013012-1004
PRELIMINARY
AC Characteristics
 ▷