EZ80L92MCU Datasheet, PDF (63/241 Pages) Zilog, Inc. – eZ80Acclaim Flash Microcontrollers

eZ80L92 MCU
Product Specification
48
Chip Selects and Wait States
The eZ80L92 generates four Chip Selects for external devices. Each Chip Select may be
programmed to access either memory space or I/O space. The Memory Chip Selects can
be individually programmed on a 64 KB boundary. The I/O Chip Selects can each choose
a 256-byte section of I/O space. In addition, each Chip Select may be programmed for up
to 7 wait states.
Memory and I/O Chip Selects
Each of the Chip Selects can be enabled for either the memory address space or the I/O
address space, but not both. To select the memory address space for a particular Chip
Select, CSx_IO (CSx_CTL[4]) must be reset to 0. To select the I/O address space for a
particular Chip Select, CSx_IO must be set to 1. After RESET, the default is for all Chip
Selects to be configured for the memory address space. For either the memory address
space or the I/O address space, the individual Chip Selects must be enabled by setting
CSx_EN (CSx_CTL[3]) to 1.
Memory Chip Select Operation
Operation of each of the Memory Chip Selects is controlled by three control registers. To
enable a particular Memory Chip Select, the following conditions must be met:
• The Chip Select is enabled by setting CSx_EN to 1
• The Chip Select is configured for Memory by clearing CSx_IO to 0
• The address is in the associated Chip Select range:
CSx_LBR[7:0] ≤ ADDR[23:16] ≤ CSx_UBR[7:0]
• No higher priority (lower number) Chip Select meets the above conditions
• A memory access instruction must be executing
If all of the foregoing conditions are met to generate a Memory Chip Select, then the fol-
lowing actions occur:
• The appropriate Chip Select—CS0, CS1, CS2, or CS3—is asserted (driven Low)
• MREQ is asserted (driven Low)
• Depending upon the instruction, either RD or WR is asserted (driven Low)
If the upper and lower bounds are set to the same value (CSx_UBR = CSx_LBR), then a
particular Chip Select is valid for a single 64 KB page.
PS013012-1004
PRELIMINARY
Chip Selects and Wait States