EZ80L92MCU Datasheet, PDF (178/241 Pages) Zilog, Inc. – eZ80Acclaim Flash Microcontrollers

eZ80L92 MCU
Product Specification
163
START command is issued at completion of the Read or Write operation, the operation
can be repeated. This allows repeated Read or Write operations without having to resend
the ZDI command. A START signal must follow to initiate a new ZDI command.
Figure 39 illustrates the timing for address Writes to ZDI registers.
ZCL
S
Single-Bit
Byte Separator
or new ZDI
START Signal
ZDI Address Byte
1
2
3
4
5
6
7
8
9
ZDA
A6 A5 A4 A3 A2 A1 A0 R/W 0/1
msb
lsb
START
Signal
Figure 39. ZDI Address Write Timing
0 = WRITE
1 = READ
ZDI Write Operations
ZDI Single-Byte Write
For single-byte Write operations, the address and write control bit are first written to the
ZDI block. Following the single-bit byte separator, the data is shifted into the ZDI block
on the next 8 rising edges of ZCL. The master terminates activity after 8 clock
cycles.Figure 40 illustrates the timing for ZDI single-byte Write operations.
ZDI Data Byte
ZCL
7
8
9
1
2
3
4
5
6
7
8
9
ZDA
A0 Write 0/1 D7 D6
msb
of DATA
D5 D4
D3 D2
D1
D0 1
lsb
of DATA
lsb of
Single-Bit
ZDI Address Byte Separator
Figure 40. ZDI Single-Byte Data Write Timing
End of Data
or New ZDI
START Signal
PS013012-1004
PRELIMINARY
ZiLOG Debug Interface