EZ80L92MCU Datasheet, PDF (169/241 Pages) Zilog, Inc. – eZ80Acclaim Flash Microcontrollers

eZ80L92 MCU
Product Specification
154
Table 84. I²C Control Registers (I2C_CTL = 00CBh)
Bit
7
6
5
4
3
2
1
0
Reset
0
0
0
0
0
0
0
0
CPU Access
R/W R/W R/W R/W R/W R/W R
R
Note: R/W = Read/Write; R = Read Only.
Bit
Position
7
IEN
6
ENAB
5
STA
4
STP
3
IFLG
2
AAK
[1:0]
Value
0
1
0
1
Description
I²C interrupt is disabled.
I²C interrupt is enabled.
The I²C bus (SCL/SDA) is disabled and all inputs are
ignored.
The I²C bus (SCL/SDA) is enabled.
0
Master mode START condition is sent.
1
Master mode start-transmit START condition on the bus.
0
Master mode STOP condition is sent.
1
Master mode stop-transmit STOP condition on the bus.
0
I²C interrupt flag is not set.
1
I²C interrupt flag is set.
0
Not Acknowledge.
1
Acknowledge.
00 Reserved.
PS013012-1004
PRELIMINARY
I²C Serial I/O Interface