EZ80L92MCU Datasheet, PDF (175/241 Pages) Zilog, Inc. – eZ80Acclaim Flash Microcontrollers

eZ80L92 MCU
Product Specification
160
upload data, with a maximum frequency of one-half the eZ80L92 system clock frequency.
Table 89 lists the recommended frequencies of the ZDI clock in relation to the system
clock.
Table 89. Recommended ZDI Clock vs. System Clock Frequency
System Clock
Frequency
3–10 Mhz
8–16 Mhz
12–24 Mhz
20–50 Mhz
ZDI Clock
Frequency
1 Mhz
2 Mhz
4 Mhz
8 Mhz
ZDI-Supported Protocol
ZDI supports a bidirectional serial protocol. The protocol defines any device that sends
data as the transmitter and any receiving device as the receiver. The device controlling the
transfer is the master and the device being controlled is the slave. The master always ini-
tiates the data transfers and provides the clock for both receive and transmit operations.
The ZDI block on the eZ80L92 is considered a slave in all data transfers.
Figure 36 illustrates the schematic for building a connector on a target board. This connec-
tor allows the user to connect directly to the ZPAK emulator using a six-pin header.
TV_DD
(Target V_DD)
10 KΩ
eZ80L92
MCU
TCK (ZCL)
TDI (ZDA)
10 KΩ
21
43
65
6-Pin Target Connector
Figure 36. Schematic For Building a Target Board ZPAK Connector
PS013012-1004
PRELIMINARY
ZiLOG Debug Interface