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| EZ80L92MCU Datasheet, PDF (76/241 Pages) Zilog, Inc. – eZ80Acclaim Flash Microcontrollers | |||
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eZ80L92 MCU
Product Specification
61
Intel⢠Bus Mode state is 2 eZ80® system clock cycles in duration. Figures 12 and 13
also illustrate the assertion of one WAIT state (TWAIT) by the selected peripheral.
System Clock
ADDR[23:0]
DATA[7:0]
CSx
ALE
T1
T2
T3
TWAIT
T4
RD
READY
WR
MREQ
or IORQ
Figure 12. Intel⢠Bus Mode Read Timing Example (Multiplexed Address and Data Bus)
PS013012-1004
PRELIMINARY
Chip Selects and Wait States
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