EZ80L92MCU Datasheet, PDF (52/241 Pages) Zilog, Inc. – eZ80Acclaim Flash Microcontrollers

eZ80L92 MCU
Product Specification
37
Table 4. Clock Peripheral Power-Down Register 1 (CLK_PPD1 = 00DBh)
Bit
7
6
5
4
3
2
1
0
Reset
0
0
0
0
0
0
0
0
CPU Access
R/W R/W R/W R R/W R/W R/W R/W
Note: R/W = Read/Write; R = Read Only.
Bit
Position
7
GPIO_D_OFF
6
GPIO_C_OFF
5
GPIO_B_OFF
4
3
SPI_OFF
2
I2C_OFF
1
UART1_OFF
0
UART0_OFF
Value Description
1
System clock to GPIO Port D is powered down.
Port D alternate functions do not operate correctly.
0
System clock to GPIO Port D is powered up.
1
System clock to GPIO Port C is powered down.
Port C alternate functions do not operate correctly.
0
System clock to GPIO Port C is powered up.
1
System clock to GPIO Port B is powered down.
Port B alternate functions do not operate correctly.
0
System clock to GPIO Port B is powered up.
Reserved.
1
System clock to SPI is powered down.
0
System clock to SPI is powered up.
1
System clock to I²C is powered down.
0
System clock to I²C is powered up.
1
System clock to UART1 is powered down.
0
System clock to UART1 is powered up.
1
System clock to UART0 and IrDA endec is powered down.
0
System clock to UART0 and IrDA endec is powered up.
PS013012-1004
PRELIMINARY
Low-Power Modes