EZ80L92MCU Datasheet, PDF (45/241 Pages) Zilog, Inc. – eZ80Acclaim Flash Microcontrollers

eZ80L92 MCU
Product Specification
30
Table 3. Register Map (Continued)
Address
(hex) Mnemonic
Name
Reset
(hex)
CPU Page
Access #
Universal Asynchronous Receiver/Transmitter 1 (UART1) Block
00D5 UART1_LSR UART 1 Line Status Register
60
00D6 UART1_MSR UART 1 Modem Status Register
XX
00D7 UART1_SPR UART 1 Scratch Pad Register
00
Low-Power Control
00DB CLK_PPD1
Clock Peripheral Power-Down Register 1
00
00DC CLK_PPD2
Clock Peripheral Power-Down Register 2
00
R/W
118
R/W
120
R/W
121
R/W
37
R/W
38
Real-Time Clock
00E0 RTC_SEC
00E1 RTC_MIN
00E2 RTC_HRS
00E3 RTC_DOW
00E4 RTC_DOM
00E5 RTC_MON
00E6 RTC_YR
00E7 RTC_CEN
RTC Seconds Register³
RTC Minutes Register
RTC Hours Register
RTC Day-of-the-Week Register
RTC Day-of-the-Month Register
RTC Month Register
RTC Year Register
RTC Century Register
XX
R/W
90
XX
R/W³
91
XX
R/W³
92
XX
R/W³
93
XX
R/W³
94
XX
R/W³
95
XX
R/W³
96
XX
R/W³
97
00E8 RTC_ASEC
RTC Alarm Seconds Register
XX
R/W
98
00E9 RTC_AMIN
RTC Alarm Minutes Register
XX
R/W
99
00EA RTC_AHRS
RTC Alarm Hours Register
XX
R/W
100
00EB RTC_ADOW
RTC Alarm Day-of-the-Week Register
0X
R/W
101
00EC
00ED
RTC_ACTRL
RTC_CTRL
RTC Alarm Control Register
RTC Control Register⁴
00
R/W
102
x0xxxx00b/ R/W
103
x0xxxx10b
Notes:
1. After an external pin reset, the Watch-Dog Timer Control register is reset to 00h. After a Watch-Dog Timer time-
out reset, the Watch-Dog Timer Control register is reset to 20h.
2. When the CPU reads this register, the current sampled value of the port is read.
3. Read-only if RTC is locked; Read/Write if RTC is unlocked.
4. After an external pin reset or a WDT reset, the RTC Control register is reset to x0xxxx00b. After an RTC Alarm
Sleep-Mode Recovery reset, the RTC Control register is reset to x0xxxx10b.
PS013012-1004
PRELIMINARY
Register Map