EZ80L92MCU Datasheet, PDF (35/241 Pages) Zilog, Inc. – eZ80Acclaim Flash Microcontrollers

eZ80L92 MCU
Product Specification
20
Table 1. 100-Pin LQFP Pin Identification of the eZ80L92 Device (Continued)
Pin # Symbol
95 PB7
Function
Signal Direction
GPIO Port B Bidirectional
MOSI
Master Out
Slave In
Bidirectional
96
V_DD
97
V_SS
98 SDA
99 SCL
100 PHI
Power Supply
Ground
I²C Serial Data Bidirectional
I²C Serial
Clock
Bidirectional
System Clock Output
Description
This pin can be used for general-purpose I/
O. It can be individually programmed as
input or output and can also be used
individually as an interrupt input. Each Port
B pin, when programmed as output, can be
selected to be an open-drain or open-
source output.
The MOSI line is configured as an output
when the eZ80L92 MCU is an SPI master
device and as an input when the eZ80L92
MCU is an SPI slave device. This signal is
multiplexed with PB7.
Power Supply.
Ground.
This pin carries the I²C data signal.
This pin is used to receive and transmit the
I²C clock.
This pin is an output driven by the internal
system clock.
Pin Characteristics
Table 2 describes the characteristics of each pin in the eZ80L92 MCU’s 100-pin LQFP
package.
Table 2. Pin Characteristics of the eZ80L92
Pin # Symbol
1
ADDR0
2
ADDR1
3
ADDR2
4
ADDR3
5
ADDR4
6
ADDR5
7
V_DD
Schmitt
Reset Active Tristate Pull Trigger
Open
Direction Direction Low/High Output Up/Down Input Drain/Source
I/O
O
N/A
Yes
No
No
No
I/O
O
N/A
Yes
No
No
No
I/O
O
N/A
Yes
No
No
No
I/O
O
N/A
Yes
No
No
No
I/O
O
N/A
Yes
No
No
No
I/O
O
N/A
Yes
No
No
No
PS013012-1004
PRELIMINARY
Architectural Overview