EZ80L92MCU Datasheet, PDF (46/241 Pages) Zilog, Inc. – eZ80Acclaim Flash Microcontrollers

eZ80L92 MCU
Product Specification
31
Table 3. Register Map (Continued)
Address
(hex) Mnemonic
Name
Reset
(hex)
CPU Page
Access #
Chip Select Bus Mode Control
00F0 CS0_BMC
Chip Select 0 Bus Mode Control Register 02h
R/W
70
00F1 CS1_BMC
Chip Select 1 Bus Mode Control Register 02h
R/W
70
00F2 CS2_BMC
Chip Select 2 Bus Mode Control Register 02h
R/W
70
00F3 CS3_BMC
Chip Select 3 Bus Mode Control Register 02h
R/W
70
Notes:
1. After an external pin reset, the Watch-Dog Timer Control register is reset to 00h. After a Watch-Dog Timer time-
out reset, the Watch-Dog Timer Control register is reset to 20h.
2. When the CPU reads this register, the current sampled value of the port is read.
3. Read-only if RTC is locked; Read/Write if RTC is unlocked.
4. After an external pin reset or a WDT reset, the RTC Control register is reset to x0xxxx00b. After an RTC Alarm
Sleep-Mode Recovery reset, the RTC Control register is reset to x0xxxx10b.
PS013012-1004
PRELIMINARY
Register Map