MC68HC08AZ60 Datasheet, PDF (86/452 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
System Integration Module (SIM)
Register Name
Bit 7
6
SIM Break Status Register (SBSR) R
R
SIM Reset Status Register (SRSR) POR
PIN
SIM Break Flag Control Register (SBFCR) BCFE
R
5
4
3
R
R
R
COP ILOP ILAD
R
R
R
2
1
Bit 0
R
SBSW
R
0
LVI
0
R
R
R
R = Reserved
Figure 2. SIM I/O Register Summary
Table 1. I/O Register Address Summary
Register
Address
SBSR
$FE00
SRSR
$FE01
SBFCR
$FE03
Table 2 shows the internal signal names used in this section.
Table 2. Signal Name Conventions
Signal Name
CGMXCLK
CGMVCLK
CGMOUT
IAB
IDB
PORRST
IRST
R/W
Description
Buffered Version of OSC1 from Clock Generator Module
(CGM)
PLL Output
PLL-Based or OSC1-Based Clock Output from CGM Module
(Bus Clock = CGMOUT Divided by Two)
Internal Address Bus
Internal Data Bus
Signal from the Power-On Reset Module to the SIM
Internal Reset Signal
Read/Write Signal
MC68HC08AZ60 — Rev 1.0
86
System Integration Module (SIM)
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