MC68HC08AZ60 Datasheet, PDF (398/452 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
Analog-to-Digital Converter (ADC-15)
NOTE:
Do not use ADC channels ATD14 or ATD12 when using the
PTD6/TACLK or PTD4/TBLCK pins as the clock inputs for the 16-bit
Timers.
Voltage
Conversion
When the input voltage to the ADC equals V_REFH (see ADC Analog
Power Pin (VDDAREF)/ADC Voltage Reference Pin (V_REFH) on page
400), the ADC converts the signal to $FF (full scale). If the input voltage
equals V_SSA, the ADC converts it to $00. Input voltages between V_REFH
and V_SSA are a straight-line linear conversion. Conversion accuracy of
all other input voltages is not guaranteed. Current injection on unused
ADC pins can also cause conversion inaccuracies.
NOTE: Input voltage should not exceed the analog supply voltages.
Conversion Time
Conversion starts after a write to the ADSCR (ADC status control
register, $0038), and requires between 16 and 17 ADC clock cycles to
complete. Conversion time in terms of the number of bus cycles is a
function of ADICLK select, CGMXCLK frequency, bus frequency, and
ADIV prescaler bits. For example, with a CGMXCLK frequency of 4
MHz, bus frequency of 8 MHz, and fixed ADC clock frequency of 1 MHz,
one conversion will take between 16 and 17 µs and there will be between
128 bus cycles between each conversion. Sample rate is approximately
60 kHz.
Refer to ADC Analog Power Pin (VDDAREF)/ADC Voltage Reference
Pin (V_REFH) on page 400.
Conversion Time = ¹ï£§⁶^to¹⁷^A^D^C ^Cl^oc^{k C}^y^cle^s
ADC Clock Frequency
Number of Bus Cycles = Conversion Time x Bus Frequency
Continuous
Conversion
In the continuous conversion mode, the ADC data register will be filled
with new data after each conversion. Data from the previous conversion
will be overwritten whether that data has been read or not. Conversions
will continue until the ADCO bit (ADC status control register, $0038) is
MC68HC08AZ60 — Rev 1.0
398
Analog-to-Digital Converter (ADC-15)
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Go to: www.freescale.com
4-adc-15
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