MC68HC08AZ60 Datasheet, PDF (132/452 Pages) Motorola, Inc – Advance Information

Mask Options
Freescale Semiconductor, Inc.
• Stop instruction
• Computer operating properly module (COP)
The mask option register ($001F) is used in the initialization of various
options. For free compatibility with the emulator OTP
(MC68HC908AZ60), a write to $001F in the MC68HC08AZ60 has no
effect on MCU operation.
Mask Option Register
Bit 7
6
5
4
3
2
1
Read: LVISTOP ROMSEC LVIRST LVIPWR SSREC COPRS STOP
Write: R
R
R
R
R
R
R
Reset:
Unaffected by Reset
R = Reserved
Figure 1. Configuration Register (CONFIG-1)
Bit 0
COPD
R
LVISTOP — LVI Stop Mode Enable Bit
LVISTOP enables the LVI module in stop mode. (See
Low-Voltage Inhibit (LVI) on page 159).
1 = LVI enabled during stop mode
0 = LVI disabled during stop mode
ROMSEC — ROM Security Bit
ROMSEC enables the RM security feature. Setting the ROMSEC bit
prevents reading of the ROM contents Acccess to the ROM is denied
to unauthorized users of customer-specified software.
1 = ROM security enabled
0 = ROM security disabled
LVIRST — LVI Reset Enable Bit
LVIRST enables the reset signal from the LVI module. (See
Low-Voltage Inhibit (LVI) on page 159).
1 = LVI module resets enabled
0 = LVI module resets disabled
MC68HC08AZ60 — Rev 1.0
132
Mask Options
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Go to: www.freescale.com
2-mops
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