MC68HC08AZ60 Datasheet, PDF (433/452 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
Appendix B: HC08AZ48 Memory Map
I/O Section
Addr.
Register Name
Bit 7
6
5
4
3
2
$004C
TIM Counter Register High ^{Read: Bit 15 14}
13
12
11
10
(TCNTH) _Write:
$004D
TIM Counter Register Low ^{Read: Bit 7}
6
5
4
3
2
(TCNTL) _Write:
$004E
TIM Modulo Register High ^Read:
(TMODH) _Write:
Bit 15
14
13
12
11
10
$004F
TIM Modulo Register Low ^Read:
(TMODL) _Write:
Bit 7
6
5
4
3
2
$FE00
SIM Break Status Register ^Read:
(SBSR) _Write:
R
R
R
R
R
R
Read: POR PIN COP ILOP ILAD
0
$FE01 SIM Reset Status Register (SRSR)
Write:
$FE03
SIM Break Flag Control Register ^Read:
(SBFCR) _Write:
BCFE
R
R
R
R
R
$FE09
Read:
RESERVED
R
R
R
R
R
R
Write:
$FE0B
Read:
RESERVED
R
R
R
R
R
R
Write:
$FE0C
Break Address Register High ^Read:
(BRKH) _Write:
Bit 15
14
13
12
11
10
$FE0D
Break Address Register Low ^Read:
(BRKL) _Write:
Bit 7
6
5
4
3
2
$FE0E
Break Status and Control ^Read:
Register (BRKSCR) _Write:
BRKE
BRKA
0
0
0
0
Read: LVIOUT 0
0
0
0
0
$FE0F
LVI Status Register (LVISR)
Write:
$FE11
Read:
RESERVED
R
R
R
R
R
R
Write:
$FE18
EEPROM Nonvolatile Register ^Read:
(EENVR2) _Write:
EERA
CON2
CON1 EEPRTCT EEBP3 EEBP2
$FE19
EEPROM Control
Register (EECR2)
Read:
Write:
EEBCLK
0
EEOFF EERAS1 EERAS0 EELAT
$FE1A
Read:
Reserved
R
R
R
R
R
R
Write:
$FE1B
EEPROM Array Control Register ^{Read: EERA}
(EEACR2) _Write:
CON2
CON1 EEPRTCT EEBP3 EEBP2
Figure 2. Control, Status, and Data Registers (Sheet 5 of 6)
1
9
1
9
1
SBSW
LVI
R
R
R
9
1
0
0
R
EEBP1
0
R
EEBP1
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
R
0
R
R
R
Bit 8
Bit 0
0
0
R
EEBP0
EEPGM
R
EEBP0
9-mem48
MOTOROLA
MC68HC08AZ60 — Rev 1.0
Appendix B: HC08AZ48 Memory Map
433
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