MC68HC08AZ60 Datasheet, PDF (325/452 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
MSCAN Controller (MSCAN08)
Clock System
Clock System
Figure 7 shows the structure of the MSCAN08 clock generation circuitry
and its interaction with the clock generation module (CGM). With this
flexible clocking scheme the MSCAN08 is able to handle CAN bus rates
ranging from 10 kbps up to 1 Mbps.
CGMXCLK
OSC
CGM
MSCAN08
÷2
PLL
CLKSRC
÷2
CGMOUT
(TO SIM)
BCS
÷2
(2 * BUS FREQ.)
PRESCALER
(1 .. 64)
MSCANCLK
Figure 7. Clocking Scheme
The clock source bit (CLKSRC) in the MSCAN08 module control register
(CMCR1) (see MSCAN08 Module Control Register 0 on page 337)
defines whether the MSCAN08 is connected to the output of the crystal
oscillator or to the PLL output.
The clock source has to be chosen such that the tight oscillator tolerance
requirements (up to 0.4%) of the CAN protocol are met.
21-mscan
MOTOROLA
MC68HC08AZ60 — Rev 1.0
MSCAN Controller (MSCAN08)
325
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