MC68HC08AZ60 Datasheet, PDF (436/452 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
Appendix B: HC08AZ48 Memory Map
Table 1. Vector Addresses (Continued)
Address
$FFF0
$FFF1
$FFF2
$FFF3
$FFF4
$FFF5
$FFF6
$FFF7
$FFF8
$FFF9
$FFFA
$FFFB
$FFFC
$FFFD
$FFFE
$FFFF
Vector
TIMA CH2 Vector (High)
TIMA CH2 Vector (Low)
TIMA CH1 Vector (High)
TIMA CH1 Vector (Low)
TIMA CH0 Vector (High)
TIMA CH0 Vector (Low)
TIM Vector (High)
TIM Vector (Low)
PLL Vector (High)
PLL Vector (Low)
IRQ1 Vector (High)
IRQ1 Vector (Low)
SWI Vector (High)
SWI Vector (Low)
Reset Vector (High)
Reset Vector (Low)
Note that all available ROM locations that not defined by the user will,
by default, be filled with the software interrupt instruction (SWI, opcode
83) – see Central Processor Unit (CPU). Please take this into account
when defining vector addresses. It is recommended that all vector
addresses are defined.
MC68HC08AZ60 — Rev 1.0
436
Appendix B: HC08AZ48 Memory Map
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