MC68HC08AZ60 Datasheet, PDF (412/452 Pages) Motorola, Inc – Advance Information

Specifications
Freescale Semiconductor, Inc.
Control Timing
Characteristic
Symbol
Min
Max
Unit
Bus Operating Frequency (4.5–5.5 V — V_DD Only)
f_BUS
—
8.4
MHz
RESET Pulse Width Low
t_RL
1.5
—
t_cyc
IRQ Interrupt Pulse Width Low (Edge-Triggered)
t_ILHI
1.5
—
t_cyc
IRQ Interrupt Pulse Period
t_ILIL
Note 4
—
t_cyc
16-Bit Timer (see Note 2)
Input Capture Pulse Width (see Note 3)
Input Capture Period
t_TH, t_TL
2
—
t_cyc
t_TLTL
Note 4
—
MSCAN Wake-up Filter Pulse Width (see Note 5)
t_WUP
2
5
µs
NOTES:
1.V_DD = 5.0 Vdc ± 0.5v, V_SS = 0 Vdc, T_A = –40 °C to T_A(MAX), unless otherwise noted.
2.The 2-bit timer prescaler is the limiting factor in determining timer resolution.
3.Refer to Table 2 . Mode, Edge, and Level Selection on page 389, and supporting note.
4.The minimum period t_TLTL or t_ILIL should not be less than the number of cycles it takes to execute the capture interrupt
service routine plus TBD t_cyc.
5. The minimum pulse width to wake up the MSCAN module is guaranteed by design but not tested.
MC68HC08AZ60 — Rev 1.0
412
Specifications
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