MC68HC08AZ60 Datasheet, PDF (261/452 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
Timer Interface Module B (TIMB)
I/O Registers
Register Name and Address TBCNTL — $0042
Bit 7
6
5
4
3
2
1
Bit 0
Read: BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
Write: R
R
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
R R = Reserved
Figure 5. TIMB Counter Registers (TBCNTH and TBCNTL)
TIMB Counter
Modulo Registers
The read/write TIMB modulo registers contain the modulo value for the
TIMB counter. When the TIMB counter reaches the modulo value, the
overflow flag (TOF) becomes set, and the TIMB counter resumes
counting from $0000 at the next clock. Writing to the high byte (TMODH)
inhibits the TOF bit and overflow interrupts until the low byte (TMODL) is
written. Reset sets the TIMB counter modulo registers.
Register Name and Address TBMODH — $0043
Bit 7
6
5
4
Read:
BIT 15
Write:
BIT 14
BIT 13
BIT 12
Reset: 1
1
1
1
3
BIT 11
1
2
BIT 10
1
1
BIT 9
1
Bit 0
BIT 8
1
Register Name and Address TBMODL — $0044
Bit 7
6
5
4
3
2
1
Bit 0
Read:
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
Write:
Reset: 1
1
1
1
1
1
1
1
Figure 6. TIMB Counter Modulo Registers (TMODH and TMODL)
NOTE: Reset the TIMB counter before writing to the TIMB counter modulo
registers.
19-timb
MOTOROLA
MC68HC08AZ60 — Rev 1.0
Timer Interface Module B (TIMB)
261
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