MC68HC08AZ60 Datasheet, PDF (351/452 Pages) Motorola, Inc – Advance Information

MSCAN08
Identifier
Acceptance
Registers
47-mscan
MOTOROLA
Freescale Semiconductor, Inc.
MSCAN Controller (MSCAN08)
Programmer’s Model of Control Registers
On reception each message is written into the background receive
buffer. The CPU is only signalled to read the message, however, if it
passes the criteria in the identifier acceptance and identifier mask
registers (accepted); otherwise, the message will be overwritten by the
next message (dropped).
The acceptance registers of the MSCAN08 are applied on the IDR0 to
IDR3 registers of incoming messages in a bit by bit manner.
For extended identifiers, all four acceptance and mask registers are
applied. For standard identifiers only the first two (CIDMR0/1 and
CIDAR0/1) are applied.
CIDAR0 Address: $0510
Bit 7
6
5
4
3
2
1
Bit 0
Read:
AC7
AC6
AC5
AC4
AC3
AC2
AC1
AC0
Write:
Reset:
Unaffected by Reset
CIDAR1 Address: $050511
Bit 7
6
5
4
3
2
1
Bit 0
Read:
AC7
AC6
AC5
AC4
AC3
AC2
AC1
AC0
Write:
Reset:
Unaffected by Reset
CIDAR2 Address: $0512
Bit 7
6
5
4
3
2
1
Bit 0
Read:
AC7
AC6
AC5
AC4
AC3
AC2
AC1
AC0
Write:
Reset:
Unaffected by Reset
CIDAR3 Address: $0513
Bit 7
6
5
4
3
2
1
Bit 0
Read:
AC7
AC6
AC5
AC4
AC3
AC2
AC1
AC0
Write:
Reset:
Unaffected by Reset
Figure 26. Identifier Acceptance Registers (CIDAR0–CIDAR3)
MC68HC08AZ60 — Rev 1.0
MSCAN Controller (MSCAN08)
351
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