MC68HC08AZ60 Datasheet, PDF (397/452 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
Analog-to-Digital Converter (ADC-15)
Functional Description
INTERNAL
DATA BUS
READ DDRB/DDRB
WRITE DDRB/DDRD
RESET
WRITE PTB/PTD
READ PTB/PTD
DDRBx/DDRDx
PTBx/PTDx
ADC DATA REGISTER
DISABLE
PTBx/PTDx
ADC CHANNEL x
DISABLE
CONVERSION
INTERRUPT ^COMPLETE
LOGIC
AIEN
COCO
CGMXCLK
BUS CLOCK
ADC VOLTAGE IN
ADC
ADCVIN
ADCH[4:0]
CHANNEL
SELECT
ADC CLOCK
CLOCK
GENERATOR
ADIV[2:0] ADICLK
Figure 1. ADC Block Diagram
ADC Port I/O Pins
PTD6/TACLK-PTD0 and PTB7/ATD7-PTB0/ATD0 are general-purpose
I/O pins that share with the ADC channels.
The channel select bits define which ADC channel/port pin will be used
as the input signal. The ADC overrides the port I/O logic by forcing that
pin as input to the ADC. The remaining ADC channels/port pins are
controlled by the port I/O logic and can be used as general-purpose I/O.
Writes to the port register or DDR will not have any affect on the port pin
that is selected by the ADC. Read of a port pin which is in use by the
ADC will return a logic 0 if the corresponding DDR bit is at logic 0. If the
DDR bit is at logic 1, the value in the port data latch is read.
3-adc-15
MOTOROLA
MC68HC08AZ60 — Rev 1.0
Analog-to-Digital Converter (ADC-15)
397
For More Information On This Product,
Go to: www.freescale.com