MC68HC08AZ60 Datasheet, PDF (422/452 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
Appendix A: Future EEPROM Registers
EEDIVH and EEDIVL Registers
EEDIVH and EEDIVL are used to store the 11-bit EEDIV value which
can be programmed by software at system initialization or during runtime
if the EEDIVSECD bit in the EEDIVH is not cleared. The EEDIV value is
calculated by the following formula:
EEDIV = INT[Reference Frequency (Hz) × 35 × 10^–6 + 0.5]
Where the result inside the bracket [ ]is rounded down to the nearest
interger value.
For example, if the Reference Frequency is 4.9152MHz, the EEDIV
value in the above formula will be 172. To examine the timebase output
of the divider, the Reference Frequency is divided by the calculated
EEDIV value (172), which equals to 28.577KHz in frequency or 34.99µs
in period.
Programming/erasing the EEPROM with an improper EEDIV value may
result in data lost and reduce endurance of the EEPROM device.
Address: $FE1A
Bit 7
6
5
4
3
2
1
Bit 0
Read:
EEDIVSECD
Write:
EEDIV10 EEDIV9 EEDIV8
Reset: EEDIVH-NVR
x
x
x
x
EEDIVH-NVR EEDIVH-NVR EEDIVH-NVR
= Unimplemented
Figure 3. EEPROM-2 Divider High Register (EEDIVH)
Address: $FE1B
Bit 7
6
5
4
3
2
1
Bit 0
Read:
EEDIV7
Write:
EEDIV6
EEDIV5
EEDIV4
EEDIV3
EEDIV2
EEDIV1
EEDIV0
Reset: EEDIVH-NVR EEDIVH-NVR EEDIVH-NVR EEDIVH-NVR EEDIVH-NVR EEDIVH-NVR EEDIVH-NVR EEDIVH-NVR
= Unimplemented
Figure 4. EEPROM-2 Divider Low Register (EEDIVL)
MC68HC08AZ60 — Rev 1.0
422
Appendix A: Future EEPROM Registers
For More Information On This Product,
Go to: www.freescale.com
2-appA
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