MC68HC08AZ60 Datasheet, PDF (178/452 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
Serial Communications Interface Module (SCI)
START
BIT BIT 0
BIT 1
BIT 2
8-BIT DATA FORMAT
(BIT M IN SCC1 CLEAR)
PARITY
OR DATA
BIT
BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 STOP
BIT
NEXT
START
BIT
START
BIT BIT 0
BIT 1
BIT 2
9-BIT DATA FORMAT
(BIT M IN SCC1 SET)
BIT 3 BIT 4 BIT 5 BIT 6
PARITY
OR DATA
BIT
BIT 7 BIT 8 STOP
BIT
NEXT
START
BIT
Figure 3. SCI Data Formats
Transmitter
Figure 4 shows the structure of the SCI transmitter.
Character Length
The transmitter can accommodate either 8-bit or 9-bit data. The state of
the M bit in SCI control register 1 (SCC1) determines character length.
When transmitting 9-bit data, bit T8 in SCI control register 3 (SCC3) is
the ninth bit (bit 8).
Character
Transmission
During an SCI transmission, the transmit shift register shifts a character
out to the TxD pin. The SCI data register (SCDR) is the write-only buffer
between the internal data bus and the transmit shift register. To initiate
an SCI transmission:
1. Enable the SCI by writing a logic 1 to the enable SCI bit (ENSCI)
in SCI control register 1 (SCC1).
2. Enable the transmitter by writing a logic 1 to the transmitter enable
bit (TE) in SCI control register 2 (SCC2).
3. Clear the SCI transmitter empty bit (SCTE) by first reading SCI
status register 1 (SCS1) and then writing to the SCDR.
4. Repeat step 3 for each subsequent transmission.
At the start of a transmission, transmitter control logic automatically
loads the transmit shift register with a preamble of logic 1s. After the
preamble shifts out, control logic transfers the SCDR data into the
transmit shift register. A logic 0 start bit automatically goes into the least
significant bit position of the transmit shift register. A logic 1 stop bit goes
into the most significant bit position.
MC68HC08AZ60 — Rev 1.0
178
Serial Communications Interface Module (SCI)
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