MC68HC08AZ60 Datasheet, PDF (301/452 Pages) Motorola, Inc – Advance Information

Port H
Port H Data
Register
23-ioports
MOTOROLA
Freescale Semiconductor, Inc.
I/O Ports
Port H
When bit DDRGx is a logic 1, reading address $000A reads the PTGx
data latch. When bit DDRGx is a logic 0, reading address $000A reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 7 summarizes the
operation of the port G pins.
Table 7. Port G Pin Functions
DDRG
Bit
0
PTG
Bit
X
I/O Pin
Mode
Input, Hi-Z
Accesses
to DDRG
Read/Write
DDRG[2:0]
Accesses to PTG
Read
Pin
Write
PTG[2:0]⁽¹⁾
1
X
Output DDRG[2:0] PTG[2:0] PTG[2:0]
X = don’t care
Hi-Z = high impedance
1. Writing affects data register, but does not affect input.
Port H is a 2-bit special function port that shares all of its pins with the
keyboard interrupt module (KBD).
The port H data register contains a data latch for each of the two port H
pins.
Address: $000B
Bit 7
6
5
4
3
2
1
Read: 0
0
0
0
0
0
PTH1
Write: R
R
R
R
R
R
Reset:
Unaffected by Reset
Alternate
Function:
KBD4
R = Reserved
Figure 23. Port H Data Register (PTH)
Bit 0
PTH0
KBD3
MC68HC08AZ60 — Rev 1.0
I/O Ports
301
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