MC68HC08AZ60 Datasheet, PDF (68/452 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
Central Processor Unit (CPU)
Index register
(H:X)
The 16-bit index register allows indexed addressing of a 64K byte
memory space. H is the upper byte of the index register and X is the
lower byte. H:X is the concatenated 16-bit index register.
In the indexed addressing modes, the CPU uses the contents of the
index register to determine the conditional address of the operand.
Bit
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read:
H:X
Write:
Reset: 0 0 0 0 0 0 0 0 X X X X X X X X
X = Indeterminate
Figure 3. Index register (H:X)
The index register can also be used as a temporary data storage
location.
Stack pointer (SP)
The stack pointer is a 16-bit register that contains the address of the next
location on the stack. During a reset, the stack pointer is preset to
$00FF. The reset stack pointer (RSP) instruction sets the least
significant byte to $FF and does not affect the most significant byte. The
stack pointer decrements as data is pushed onto the stack and
increments as data is pulled from the stack.
In the stack pointer 8-bit offset and 16-bit offset addressing modes, the
stack pointer can function as an index register to access data on the
stack. The CPU uses the contents of the stack pointer to determine the
conditional address of the operand.
Bit
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read:
SP
Write:
Reset: 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Figure4. Stack pointer (SP)
MC68HC08AZ60 — Rev 1.0
68
Central Processor Unit (CPU)
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