MC68HC08AZ60 Datasheet, PDF (291/452 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
I/O Ports
Port D
READ DDRD ($0007)
WRITE DDRD ($0007)
RESET
WRITE PTD ($0003)
READ PTD ($0003)
DDRDx
PTDx
PTDx
Figure 13. Port D I/O Circuit
When bit DDRDx is a logic 1, reading address $0003 reads the PTDx
data latch. When bit DDRDx is a logic 0, reading address $0003 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 4 summarizes the
operation of the port D pins.
Table 4. Port D Pin Functions
DDRD PTD
Bit Bit
I/O Pin
Mode
0
X Input, Hi-Z
Accesses to
DDRD
Read/Write
DDRD[7:0]
Accesses to PTD
Read
Pin
Write
PTD[7:0]⁽¹⁾
1
X
Output
DDRD[7:0]
PTD[7:0]
PTD[7:0]
X = don’t care
Hi-Z = high impedance
1. Writing affects data register, but does not affect input.
13-ioports
MOTOROLA
MC68HC08AZ60 — Rev 1.0
I/O Ports
291
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