MC68HC08AZ60 Datasheet, PDF (241/452 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
Serial Peripheral Interface Module (SPI)
I/O Registers
If the MODFEN bit is low, the level of the SS pin does not affect the
operation of an enabled SPI configured as a master. For an enabled
SPI configured as a slave, having MODFEN low only prevents the
MODF flag from being set. It does not affect any other part of SPI
operation. (See Mode Fault Error on page 225).
SPR1 and SPR0 — SPI Baud Rate Select Bits
In master mode, these read/write bits select one of four baud rates as
shown in Table 6. SPR1 and SPR0 have no effect in slave mode.
Reset clears SPR1 and SPR0.
Table 6. SPI Master Baud Rate Selection
SPR1:SPR0
00
01
10
11
Baud Rate Divisor (BD)
2
8
32
128
Use this formula to calculate the SPI baud rate:
where:
Baud rate = ^{C-----2G----M}_×-----B-O----DU----T---
CGMOUT = base clock output of the clock generator module (CGM),
see Clock Generator Module (CGM) on page 105.
BD = baud rate divisor
SPI Data Register
The SPI data register is the read/write buffer for the receive data register
and the transmit data register. Writing to the SPI data register writes data
into the transmit data register. Reading the SPI data register reads data
from the receive data register. The transmit data and receive data
registers are separate buffers that can contain different values. See
Figure 1
31-spi
MOTOROLA
MC68HC08AZ60 — Rev 1.0
Serial Peripheral Interface Module (SPI)
241
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