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MC68HC08AZ60 Datasheet, PDF (222/452 Pages) Motorola, Inc – Advance Information
Freescale Semiconductor, Inc.
Serial Peripheral Interface Module (SPI)
BUS
CLOCK
WRITE
TO SPDR
INITIATION DELAY
MOSI
SCK
CPHA = 1
SCK
CPHA = 0
SCK CYCLE
NUMBER
MSB
BIT 6
BIT 5
1
2
3
INITIATION DELAY FROM WRITE SPDR TO TRANSFER BEGIN
BUS
CLOCK
WRITE
TO SPDR
BUS
CLOCK
EARLIEST LATEST
WRITE
TO SPDR
SCK = INTERNAL CLOCK ÷ 2;
2 POSSIBLE START POINTS
BUS
CLOCK
EARLIEST
WRITE
TO SPDR
SCK = INTERNAL CLOCK ÷ 8;
8 POSSIBLE START POINTS
LATEST
BUS
CLOCK
EARLIEST
WRITE
TO SPDR
SCK = INTERNAL CLOCK ÷ 32;
32 POSSIBLE START POINTS
LATEST
EARLIEST
SCK = INTERNAL CLOCK ÷ 128;
128 POSSIBLE START POINTS
LATEST
Figure 5. Transmission Start Delay (Master)
MC68HC08AZ60 — Rev 1.0
222
Serial Peripheral Interface Module (SPI)
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