MC68HC08AZ60 Datasheet, PDF (285/452 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
I/O Ports
Port B
READ DDRB ($0005)
WRITE DDRB ($0005)
RESET
WRITE PTB ($0001)
DDRBx
PTBx
PTBx
READ PTB ($0001)
Figure 7. Port B I/O Circuit
When bit DDRBx is a logic 1, reading address $0001 reads the PTBx
data latch. When bit DDRBx is a logic 0, reading address $0001 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 2 summarizes the
operation of the port B pins.
Table 2. Port B Pin Functions
DDRB
Bit
0
PTB
Bit
X
I/O Pin
Mode
Input, Hi-Z
Accesses
to DDRB
Read/Write
DDRB[7:0]
Accesses to PTB
Read
Pin
Write
PTB[7:0]⁽¹⁾
1
X
Output
DDRB[7:0] PTB[7:0]
PTB[7:0]
X = don’t care
Hi-Z = high impedance
1. Writing affects data register, but does not affect input.
7-ioports
MOTOROLA
MC68HC08AZ60 — Rev 1.0
I/O Ports
285
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