MC68HC08AZ60 Datasheet, PDF (350/452 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
MSCAN Controller (MSCAN08)
The IDHIT indicators are always related to the message in the
foreground buffer. When a message gets copied from the background to
the foreground buffer, the indicators are updated as well.
NOTE: The CIDAC register can be written only if the SFTRES bit in the CMCR0
is set.
MSCAN08 Receive
Error Counter
Address: $050E
Bit 7
6
5
4
3
2
1
Bit 0
Read: RXERR7 RXERR6 RXERR5 RXERR4 RXERR3 RXERR2 RXERR1 RXERR0
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 24. Receiver Error Counter (CRXERR)
This register reflects the status of the MSCAN08 receive error counter.
The register is read only.
MSCAN08 Transmit
Error Counter
Address: $050F
Bit 7
6
5
4
3
2
1
Bit 0
Read: TXERR7 TXERR6 TXERR5 TXERR4 TXERR3 TXERR2 TXERR1 TXERR0
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 25. Transmit Error Counter (CTXERR)
This register reflects the status of the MSCAN08 transmit error counter.
The register is read only.
NOTE: Both error counters may only be read when in Sleep or Soft Reset mode.
MC68HC08AZ60 — Rev 1.0
350
MSCAN Controller (MSCAN08)
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Go to: www.freescale.com
46-mscan
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