MC68HC08AZ60 Datasheet, PDF (414/452 Pages) Motorola, Inc – Advance Information

Specifications
Freescale Semiconductor, Inc.
5.0 Vdc ± 0.5 V Serial Peripheral Interface (SPI) Timing
Num
Characteristic
Symbol
Min
Max Unit
Operating Frequency (see Note 3)
Master
Slave
Cycle Time
1
Master
Slave
2 Enable Lead Time
3 Enable Lag Time
Clock (SCK) High Time
4
Master
Slave
Clock (SCK) Low Time
5
Master
Slave
Data Setup Time (Inputs)
6
Master
Slave
Data Hold Time (Inputs)
7
Master
Slave
Access Time, Slave (see Note 4)
8
CPHA = 0
CPHA = 1
9 Slave Disable Time (Hold Time to High-Impedance State)
Enable Edge Lead Time to Data Valid (see Note 6)
10
Master
Slave
Data Hold Time (Outputs, after Enable Edge)
11
Master
Slave
12
Data Valid
Master (Before Capture Edge)
f_BUS(M)
f_BUS(S)
f_BUS/128 f_BUS/2 MHz
dc
f_BUS
t_cyc(M)
t_cyc(S)
t_Lead
t_Lag
2
128
t_cyc
1
—
15
—
ns
15
—
ns
t_W(SCKH)M
100
—
ns
t_W(SCKH)S
50
—
t_W(SCKL)M
100
—
ns
t_W(SCKL)S
50
—
t_SU(M)
t_SU(S)
45
—
ns
5
—
t_H(M)
0
—
ns
t_H(S)
15
—
t_A(CP0)
t_A(CP1)
t_DIS
0
40
ns
0
20
—
25
ns
t_EV(M)
t_EV(S)
—
10
ns
—
40
t_HO(M)
t_HO(S)
t_V(M)
0
—
ns
5
—
90
—
ns
13
Data Hold Time (Outputs)
Master (Before Capture Edge)
t_HO(M)
100
—
ns
NOTES:
1. All timing is shown with respect to 30% V_DD and 70% V_DD, unless otherwise noted; assumes 100 pF load on all SPI
pins.
2. Item numbers refer to dimensions in Figure 1 and Figure 2.
3. f_BUS = the currently active bus frequency for the microcontroller.
4. Time to data active from high-impedance state.
5. With 100 pF on all SPI pins
MC68HC08AZ60 — Rev 1.0
414
Specifications
For More Information On This Product,
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8-specs
MOTOROLA