MC68HC08AZ60 Datasheet, PDF (281/452 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
I/O Ports
Port A
Port A
Port A Data
Register
Data Direction
Register A
Port A is an 8-bit general-purpose bidirectional I/O port.
The port A data register contains a data latch for each of the eight
port A pins.
Address: $0000
Bit 7
6
5
4
3
2
1
Bit 0
Read:
PTA7 PTA6 PTA5 PTA4 PTA3 PTA2 PTA1 PTA0
Write:
Reset:
Unaffected by Reset
Figure 2. Port A Data Register (PTA)
PTA[7:0] — Port A Data Bits
These read/write bits are software programmable. Data direction of
each port A pin is under the control of the corresponding bit in data
direction register A. Reset has no effect on port A data.
Data direction register A determines whether each port A pin is an input
or an output. Writing a logic 1 to a DDRA bit enables the output buffer for
the corresponding port A pin; a logic 0 disables the output buffer.
Address: $0004
Bit 7
6
5
4
3
2
1
Read:
DDRA7 DDRA6 DDRA5 DDRA4 DDRA3 DDRA2 DDRA1
Write:
Reset: 0
0
0
0
0
0
0
Figure 3. Data Direction Register A (DDRA)
Bit 0
DDRA0
0
3-ioports
MOTOROLA
MC68HC08AZ60 — Rev 1.0
I/O Ports
281
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