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MC68HC08AZ60 Datasheet, PDF (216/452 Pages) Motorola, Inc – Advance Information
Freescale Semiconductor, Inc.
Serial Peripheral Interface Module (SPI)
Master Mode
The SPI operates in master mode when the SPI master bit, SPMSTR
(SPCR $0010), is set.
NOTE:
Configure the SPI modules as master and slave before enabling them.
Enable the master SPI before enabling the slave SPI. Disable the slave
SPI before disabling the master SPI. See SPI Control Register on page
236.
Only a master SPI module can initiate transmissions. Software begins
the transmission from a master SPI module by writing to the SPI data
register. If the shift register is empty, the byte immediately transfers to
the shift register, setting the SPI transmitter empty bit, SPTE (SPSCR
$0011). The byte begins shifting out on the MOSI pin under the control
of the serial clock. (See Table 4).
The SPR1 and SPR0 bits control the baud rate generator and determine
the speed of the shift register. (See SPI Status and Control Register
on page 238). Through the SPSCK pin, the baud rate generator of the
master also controls the shift register of the slave peripheral.
MASTER MCU
SHIFT REGISTER
BAUD RATE
GENERATOR
MISO
MOSI
SPSCK
SS
SLAVE MCU
MISO
MOSI
SPSCK
SHIFT REGISTER
SS
VDD
Figure 2. Full-Duplex Master-Slave Connections
MC68HC08AZ60 — Rev 1.0
216
Serial Peripheral Interface Module (SPI)
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