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MC9S12HY64 Datasheet, PDF (86/792 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers
Port Integration Module (S12HYPIMV1)
Table 2-19. PTS Register Field Descriptions (continued)
Field
1
PTS
0
PTS
Description
Port S general purpose input/output data—Data Register, SCI TXD, PWM channel7
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The SCI takes precedence over the PWM7 and general purpose I/O function if enabled
• The PWM7 takes precedence over the general purpose I/O function if enabled
Port S general purpose input/output data—Data Register, SCI RXD, PWM channel6
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The SCI takes precedence over the PWM6 and general purpose I/O function if enabled
• The PWM6 takes precedence over the general purpose I/O function if enabled
2.3.23 Port S Input Register (PTIS)
Address 0x0249
7
R PTIS7
6
PTIS6
5
PTIS5
4
PTIS4
3
PTIS3
2
PTIS2
W
Reset
u
u
u
u
u
u
= Unimplemented or Reserved
u = Unaffected by reset
Figure 2-21. Port S Input Register (PTIS)
1 Read: Anytime.
Write:Never, writes to this register have no effect.
Access: User read1
1
PTIS1
0
PTIS0
u
u
Field
7-0
PTIS
Table 2-20. PTIS Register Field Descriptions
Description
Port S input data—
This register always reads back the buffered state of the associated pins. This can also be used to detect overload
or short circuit conditions on output pins.
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
86
Freescale Semiconductor