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MC9S12HY64 Datasheet, PDF (740/792 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers | |||
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Electrical Characteristics
A.4 Reset, Oscillator,IRC,IVREG,IPLL
A.5 Phase Locked Loop
A.5.1 Jitter Deï¬nitions
With each transition of the feedback clock, the deviation from the reference clock is measured and input
voltage to the VCO is adjusted accordingly.The adjustment is done continuously with no abrupt changes
in the VCOCLK frequency. Noise, voltage, temperature and other factors cause slight variations in the
control loop resulting in a clock jitter. This jitter affects the real minimum and maximum clock periods as
illustrated in Figure A-2.
0
1
2
3
N-1
N
tmin1
tnom
tmax1
tminN
tmaxN
Figure A-2. Jitter Deï¬nitions
The relative deviation of tnom is at its maximum for one clock period, and decreases towards zero for larger
number of clock periods (N).
Deï¬ning the jitter as:
J(N)
=

max
ï£
1
â
t-N-m-----â
-a--t-nx----(o--N--m---)
,
1
â
N-t--m---â
--i-t-n-n---(-o-N---m--)-



For N < 100, the following equation is a good ï¬t for the maximum jitter:
J(N) = ---j-1----
N
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
740
Freescale Semiconductor
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