MC9S12HY64 Datasheet, PDF (546/792 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

32 KByte Flash Module (S12FTMRC32K1V1)
If a Flash block is read during execution of an algorithm (CCIF = 0) on that same block, the read operation
will return invalid data. If the SFDIF or DFDIF flags were not previously set when the invalid read
operation occurred, both the SFDIF and DFDIF flags will be set.
If the ACCERR or FPVIOL bits are set in the FSTAT register, the user must clear these bits before starting
any command write sequence (see Section 15.3.2.7).
CAUTION
A Flash word or phrase must be in the erased state before being
programmed. Cumulative programming of bits within a Flash word or
phrase is not allowed.
15.4.5.1 Erase Verify All Blocks Command
The Erase Verify All Blocks command will verify that all P-Flash and D-Flash blocks have been erased.
Table 15-31. Erase Verify All Blocks Command FCCOB Requirements
CCOBIX[2:0]
000
FCCOB Parameters
0x01
Not required
Upon clearing CCIF to launch the Erase Verify All Blocks command, the Memory Controller will verify
that the entire Flash memory space is erased. The CCIF flag will set after the Erase Verify All Blocks
operation has completed.
Table 15-32. Erase Verify All Blocks Command Error Handling
Register
Error Bit
Error Condition
ACCERR Set if CCOBIX[2:0] != 000 at command launch
FSTAT
FPVIOL
MGSTAT1
None
Set if any errors have been encountered during the read¹
MGSTAT0 Set if any non-correctable errors have been encountered during the read¹
1 _{As found in the memory map for FTMRC64K1.}
15.4.5.2 Erase Verify Block Command
The Erase Verify Block command allows the user to verify that an entire P-Flash or D-Flash block has been
erased. The FCCOB upper global address bits determine which block must be verified.
Table 15-33. Erase Verify Block Command FCCOB Requirements
CCOBIX[2:0]
000
FCCOB Parameters
0x02
Global address [17:16] of the
Flash block to be verified.
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
546
Freescale Semiconductor