MC9S12HY64 Datasheet, PDF (186/792 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

S12S Debug Module (S12SDBGV2)
6.3 Memory Map and Registers
6.3.1 Module Memory Map
A summary of the registers associated with the DBG sub-block is shown in Figure 6-2. Detailed
descriptions of the registers and bits are given in the subsections that follow.
Address Name
Bit 7
6
5
4
3
2
R
0
0
0
0x0020 DBGC1
ARM
BDM DBGBRK
W
TRIG
R ¹TBF
0
0
0
0
SSF2
0x0021 DBGSR
W
R
0
0
0
0x0022 DBGTCR
TSOURCE
W
TRCMOD
R
0
0
0
0
0
0
0x0023 DBGC2
W
R Bit 15
0x0024 DBGTBH
W
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
0x0025
0x0026
R
DBGTBL
W
Bit 7
R ¹ TBF
DBGCNT
W
Bit 6
0
Bit 5
Bit 4
Bit 3
Bit 2
CNT
R
0
0
0
0
0x0027 DBGSCRX
SC3
SC2
W
R
0
0
0
0
0
MC2
0x0027 DBGMFR
W
2 _0x0028
R
DBGACTL
SZE
SZ
TAG
BRK
RW
RWE
W
3 _0x0028
R
DBGBCTL
SZE
SZ
TAG
BRK
RW
RWE
W
4 _0x0028
R
0
DBGCCTL
W
0
TAG
BRK
RW
RWE
R
0
0
0
0
0
0
0x0029 DBGXAH
W
R
0x002A DBGXAM
Bit 15
14
13
12
11
10
W
R
0x002B DBGXAL
Bit 7
6
5
4
3
2
W
R
0x002C DBGADH
Bit 15
14
13
12
11
10
W
R
0x002D DBGADL
Bit 7
6
5
4
3
2
W
Figure 6-2. Quick Reference to DBG Registers
1
Bit 0
COMRV
SSF1
SSF0
0
TALIGN
ABCM
Bit 9
Bit 8
Bit 1
Bit 0
SC1
MC1
SC0
MC0
NDB
0
0
COMPE
COMPE
COMPE
Bit 17
Bit 16
9
Bit 8
1
Bit 0
9
Bit 8
1
Bit 0
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
186
Freescale Semiconductor