MC9S12HY64 Datasheet, PDF(671/792 Page) Freescale Semiconductor, Inc – S12 Microcontrollers

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MC9S12HY64 Datasheet, PDF (671/792 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

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Liquid Crystal Display (LCD40F4BV1) Block Description

Table 18-6. FPENR0âFPENR4 Field Descriptions

Field

Description

39:0

FP[39:0]EN

Frontplane Output Enable â The FP[39:0]EN bit enables the frontplane driver outputs. If LCDEN = 0, these

bits have no effect on the state of the I/O pins. It is recommended to set FP[39:0]EN bits before LCDEN is set.

0 Frontplane driver output disabled on FP[39:0].

1 Frontplane driver output enabled on FP[39:0].

18.3.2.4 LCD RAM (LCDRAM)

The LCD RAM consists of 20 bytes. After reset the LCD RAM contents will be indeterminate (I), as

indicated by Figure 18-9.

7

0x0008

LCDRAM

R

FP1BP3

W

Reset

I

0x0009

LCDRAM

R

FP3BP3

W

Reset

I

0x000A

LCDRAM

R

FP5BP3

W

Reset

I

0x000B

LCDRAM

R

FP7BP3

W

Reset

I

0x000C

LCDRAM

R

FP9BP3

W

Reset

I

0x000D

LCDRAM

R

FP11BP3

W

Reset

I

0x000E

LCDRAM

R

FP13BP3

W

Reset

I

0x000F

LCDRAM

R

FP15BP3

W

Reset

I

0x0010

LCDRAM

R

FP17BP3

W

Reset

I

I = Value is indeterminate

6

5

4

3

FP1BP2 FP1BP1 FP1BP0 FP0BP3

I

I

I

I

FP3BP2 FP3BP1 FP3BP0 FP2BP3

I

I

I

I

FP5BP2 FP5BP1 FP5BP0 FP4BP3

I

I

I

I

FP7BP2 FP7BP1 FP7BP0 FP6BP3

I

I

I

I

FP9BP2 FP9BP1 FP9BP0 FP8BP3

I

I

I

I

FP11BP2 FP11BP1 FP11BP0 FP10BP3

I

I

I

I

FP13BP2 FP13BP1 FP13BP0 FP12BP3

I

I

I

I

FP15BP2 FP15BP1 FP15BP0 FP14BP3

I

I

I

I

FP17BP2 FP17BP1 FP17BP0 FP16BP3

I

I

I

I

Figure 18-9. LCD RAM (LCDRAM)

2

FP0BP2

I

FP2BP2

I

FP4BP2

I

FP6BP2

I

FP8BP2

I

FP10BP2

I

FP12BP2

I

FP14BP2

I

FP16BP2

I

1

FP0BP1

I

FP2BP1

I

FP4BP1

I

FP6BP1

I

FP8BP1

I

FP10BP1

I

FP12BP1

I

FP14BP1

I

FP16BP1

I

0

FP0BP0

I

FP2BP0

I

FP4BP0

I

FP6BP0

I

FP8BP0

I

FP10BP0

I

FP12BP0

I

FP14BP0

I

FP16BP0

I

MC9S12HY/HA-Family Reference Manual, Rev. 1.04

Freescale Semiconductor

671

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