MC9S12HY64 Datasheet, PDF (194/792 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

S12S Debug Module (S12SDBGV2)
6.3.2.7 Debug State Control Registers
There is a dedicated control register for each of the state sequencer states 1 to 3 that determines if
transitions from that state are allowed, depending upon comparator matches or tag hits, and defines the
next state for the state sequencer following a match. The three debug state control registers are located at
the same address in the register address map (0x0027). Each register can be accessed using the COMRV
bits in DBGC1 to blend in the required register. The COMRV = 11 value blends in the match flag register
(DBGMFR).
Table 6-14. State Control Register Access Encoding
COMRV
00
01
10
11
Visible State Control Register
DBGSCR1
DBGSCR2
DBGSCR3
DBGMFR
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
194
Freescale Semiconductor