MC9S12HY64 Datasheet, PDF (749/792 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Electrical Characteristics
In Table A-26 the timing characteristics for master mode are listed.
Table A-26. SPI Master Mode Timing Characteristics
Num C
Characteristic
Symbol
Min
Typ
Max
Unit
1
D SCK frequency
1
D SCK period
MIN(16, f_bus/2)⁽¹⁾
f_sck
f_bus/2048
—
MIN(10,f_bus/2) ⁽²⁾
MHZ
MIN(0.8,f_bus/2)⁽³⁾
MAX(62.5, 2*t_bus)¹
t_sck
MAX(100, 2*t_bus)²
—
2048 ∗ t_bus
ns
MAX(1250, 2*t_bus)³
2
D Enable lead time
t_lead
—
1/2
—
t_sck
3
D Enable lag time
t_lag
—
1/2
—
t_sck
4
D
Clock (SCK) high or low
time
t_wsck
—
1/2
—
t_sck
8^1,2
—
—
ns
5
D Data setup time (inputs)
t_su
220³
—
—
ns
8^1,2
—
—
ns
6
D Data hold time (inputs)
t_hi
220³
—
—
ns
15^1,2
ns
9
D Data valid after SCK edge
t_vsck
—
—
220³
ns
10
D
Data valid after SS fall
(CPHA = 0)
t_vss
—
—
15
ns
11
D Data hold time (outputs)
t_ho
12
D Rise and fall time inputs
t_rfi
20
—
—
ns
8^1,2
ns
—
—
85³
ns
13
D Rise and fall time outputs
t_rfo
8^1,2
ns
—
—
85³
ns
1. SPI on non-motor pad ports (Port S or Por t H)
2. SPI on Port V with slew rate control disable. All the SPI pins slew rate control should be disabled.
3. SPI on Port V with slew rate control enabled. All the SPI pins slew rate control should be enabled.
4. MIN(16, f_bus/2) means select minimum frequency value from 16MHZ and f_bus/2MHZ. same for the other MIN(X,Y)
5. MAX(62.5, 2*t_bus) means select the maximum period value from 62.5ns and 2*t_bus ns. same for the other MAX(X,Y)
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Freescale Semiconductor
749