MC9S12HY64 Datasheet, PDF (19/792 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Device Overview MC9S12HY/HA-Family
1.4 Block Diagram
Figure 1-1 shows a block diagram of the MC9S12HY/HA-Family devices
32K/48K/64K bytes Flash
2K/4K bytes RAM
4K bytes Data Flash
ATD
10-bit 8-channel
Analog-Digital Converter
AN[7:0]
VDDR
VSS3
BKGD
EXTAL
XTAL
VSSPLL
RESET
TEST
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PU0
PU1
PU2
PU3
PU4
PU5
PU6
PU7
PV0
PV1
PV2
PV3
PV4
PV5
PV6
PV7
VLCD
Voltage Regulator
CPU12-V1
Debug Module
Single-wire Background 3 address breakpoints
Debug Module
1 data breakpoints
64 Byte Trace Buffer
Amplitude Controlled
Low Power Pierce or
Full drive Pierce
Oscillator
PLL with Frequency
Modulation option
Clock Monitor
COP Watchdog
Periodic Interrupt
Auto. Periodic Int.
Reset Generation
and Test Entry
Multilevel
Interrupt Module
IRQ
XIRQ
Motor Driver0
TIM1
TIM0
IOC1_0
IOC1_1
IOC1_2
IOC1_3
IOC1_4
IOC1_5
IOC1_6
IOC1_7
IOC0_0
IOC0_1
IOC0_2
IOC0_3
IOC0_4
IOC0_5
IOC0_6
IOC0_7
SCI
RXD
Asynchronous Serial IF TXD
CAN(HY family only) _RXCAN
msCAN 2.0B
TXCAN
SPI
MISO
MOSI
SCK
Synchronous Serial IF
SS
IIC
SDA
SCL
ECLK
Motor Driver1
Motor Driver2
Motor Driver3
PWM
8-bit 8channel
Pulse Width Modulator
PWM0
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7
5V IO Supply
VDDX/VSSX
VDDM1/VSSM1
VDDM2/VSSM2
VDDA/VSSA
Figure 1-1. MC9S12HY/HA-Family 100 LQFP Block Diagram
VDDA/VRH
VSSA/VRL
PAD[7:0]
PT0
PT1
PT2
PT3
PT4
PT5
PT6
PT7
PR0
PR1
PR2
PR3
PR4
PR5
PR6
PR7
PS0
PS1
PS2
PS3
PS4
PS5
PS6
PS7
PH0
PH1
PH2
PH3
PH4
PH5
PH6
PH7
PP0
PP1
PP2
PP3
PP4
PP5
PP6
PP7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Freescale Semiconductor
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