MC9S12HY64 Datasheet, PDF (111/792 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

2.3.62 Port R Polarity Select Register (PPSR)
Port Integration Module (S12HYPIMV1)
Address 0x0285
R
W
Reset
7
PPSR7
1
1 _{Read: Anytime.}
Write: Anytime.
6
PPSR6
5
PPSR5
4
PPSR4
3
PPSR3
2
PPSR2
1
1
1
1
1
Figure 2-60. Port R Polarity Select Register (PPSR)
Access: User read/write¹
1
0
PPSR1
PPSR0
1
1
Table 2-52. PPSR Register Field Descriptions
Field
7-0
PPSR
Description
Port R pull device select—Determine pull device polarity on input pins
This register selects whether a pull-down or a pull-up device is connected to the pin. The 3-0 bits also select the
polarity of the active interrupt edge
1 A rising edge on the associated Port R pin sets the associated flag bit in the PIFR register. A pull-down device is
connected to the associated pin, if enabled and if the pin is used as input.
0 A falling edge on the associated Port R pin sets the associated flag bit in the PIFR register. A pull-up device is
connected to the associated pin, if enabled and if the pin is used as input.
2.3.63 Port R Wired-Or Mode Register (WOMR)
Address 0x0286
R
W
Reset
7
WOMR7
0
1 _{Read: Anytime.}
Write: Anytime.
6
WOMR6
5
WOMR5
4
WOMR4
3
WOMR3
2
WOMR2
0
0
0
0
0
Figure 2-61. Port R Wired-Or Mode Register (WOMR)
Access: User read/write¹
1
0
WOMR1
WOMR0
0
0
Table 2-53. WOMR Register Field Descriptions
Field
Description
7-0
WOMR
Port R wired-or mode—Enable wired-or functionality
This register configures the output pins as wired-or. If enabled the output is driven active low only (open-drain). A
logic level of “1” is not driven.This allows a multipoint connection of several serial modules. These bits have no
influence on pins used as inputs.
1 Output buffers operate as open-drain outputs.
0 Output buffers operate as push-pull outputs.
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Freescale Semiconductor
111