MC9S12HY64 Datasheet, PDF (234/792 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

S12 Clock, Reset and Power Management Unit (S12CPMU) Block Description
Addres
s
Name
R
0x02F3 CPMUAPITR
W
R
0x02F4 CPMUAPIRH
W
R
0x02F5 CPMUAPIRL
W
0x02F6
RESERVED
CPMUTEST3
R
W
R
0x02F7 CPMUHTTR
W
0x02F8
CPMU
IRCTRIMH
R
W
0x02F9
CPMU
IRCTRIML
R
W
R
0x02FA CPMUOSC
W
R
0x02FB CPMUPROT
W
0x02FC
RESERVED
CPMUTEST2
R
W
Bit 7
APITR5
APIR15
APIR7
0
HTOE
OSCE
0
0
6
5
APITR4 APITR3
APIR14 APIR13
APIR6
0
APIR5
0
0
0
TCTRIM[3:0]
0
OSCBW
0
0
0
0
4
3
2
1
0
APITR2 APITR1 APITR0
Bit 0
0
APIR12 APIR11 APIR10 APIR9
APIR8
APIR4
0
APIR3
0
APIR2
0
APIR1
0
APIR0
0
0
HTTR3 HTTR2 HTTR1 HTTR0
0
0
IRCTRIM[9:8]
IRCTRIM[7:0]
OSCFILT[4:0]
0
0
0
0
PROT
0
0
0
0
0
= Unimplemented or Reserved
Figure 7-3. CPMU Register Summary
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
234
Freescale Semiconductor