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MC9S12HY64 Datasheet, PDF (469/792 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers
Serial Peripheral Interface (S12SPIV5)
Table 13-9. SPIF Interrupt Flag Clearing Sequence
XFRW Bit
SPIF Interrupt Flag Clearing Sequence
0
Read SPISR with SPIF == 1 then
Read SPIDRL
1
Read SPISR with SPIF == 1
Byte Read SPIDRL 1
or
then Byte Read SPIDRH 2 Byte Read SPIDRL
or
Word Read (SPIDRH:SPIDRL)
1 Data in SPIDRH is lost in this case.
2 SPIDRH can be read repeatedly without any effect on SPIF. SPIF Flag is cleared only by the read
of SPIDRL after reading SPISR with SPIF == 1.
Table 13-10. SPTEF Interrupt Flag Clearing Sequence
XFRW Bit
SPTEF Interrupt Flag Clearing Sequence
0
Read SPISR with SPTEF == 1 then
Write to SPIDRL 1
1 Read SPISR with SPTEF == 1
Byte Write to SPIDRL 12
or
then Byte Write to SPIDRH 13 Byte Write to SPIDRL 1
or
Word Write to (SPIDRH:SPIDRL) 1
1 Any write to SPIDRH or SPIDRL with SPTEF == 0 is effectively ignored.
2 Data in SPIDRH is undefined in this case.
3 SPIDRH can be written repeatedly without any effect on SPTEF. SPTEF Flag is cleared only by
writing to SPIDRL after reading SPISR with SPTEF == 1.
MC9S12HY/HA-Family Reference Manual Rev. 1.04
Freescale Semiconductor
469