MC9S12HY64 Datasheet, PDF (770/792 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Detailed Register Address Map
Address Name
Bit 7
R0
0x006F Reserved
W
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
0
Bit 0
0
0x0070–0x009F Analog to Digital converter (ATD) Map
Address Name
Bit 7
6
5
4
3
2
1
Bit 0
R
0
0
0
0x0070 ATDCTL0
Reserved
WRAP3 WRAP2 WRAP1 WRAP0
W
0x0071
ATDCTL1
R
ETRIGSEL SRES1
W
SRES0 SMP_DIS ETRIGCH3 ETRIGCH2 ETRIGCH1 ETRIGCH0
R
0
0x0072 ATDCTL2
W
AFFC ICLKSTP ETRIGLE ETRIGP ETRIGE ASCIE ACMPIE
R
0x0073 ATDCTL3
DJM
S8C
S4C
S2C
S1C
FIFO
FRZ1
FRZ0
W
R
0x0074 ATDCTL4
SMP2
W
SMP1 SMP0
PRS[4:0]
R
0
0x0075 ATDCTL5
SC
SCAN MULT
CD
CC
CB
CA
W
R
0x0076 ATDSTAT0
W
SCF
0
CC3
ETORF FIFOR
CC2
CC1
CC0
0x0077
Unimple- ^R
mented _W
0
0
0
0
0
0
0
0
R
0
0
0
0
0
0
0
0
0x0078 ATDCMPEH
W
R
0x0079 ATDCMPEL
W
CMPE[7:0]
R
0
0
0
0
0
0
0
0
0x007A ATDSTAT2H
W
R
0x007B ATDSTAT2L
W
CCF[7:0]
R
0
0
0
0
0
0
0
0
0x007C ATDDIENH
W
R
0x007D ATDDIENL
W
IEN[7:0]
R
0
0
0
0
0
0
0
0
0x007E ATDCMPHTH
W
R
0x007F ATDCMPHTL
W
CMPHT[7:0]
R
0x0080 ATDDR0
W
See Section 8.3.2.12.1, “Left Justified Result Data (DJM=0)”
and Section 8.3.2.12.2, “Right Justified Result Data (DJM=1)”
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
770
Freescale Semiconductor