MC9S12HY64 Datasheet, PDF (201/792 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

S12S Debug Module (S12SDBGV2)
6.3.2.8.2 Debug Comparator Address High Register (DBGXAH)
Address: 0x0029
7
R
0
W
Reset
0
6
5
4
3
2
1
0
0
0
0
0
Bit 17
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 6-16. Debug Comparator Address High Register (DBGXAH)
0
Bit 16
0
The DBGC1_COMRV bits determine which comparator address registers are visible in the 8-byte window
from 0x0028 to 0x002F as shown in Table 6-24.
Table 6-24. Comparator Address Register Visibility
COMRV
00
01
10
11
Visible Comparator
DBGAAH, DBGAAM, DBGAAL
DBGBAH, DBGBAM, DBGBAL
DBGCAH, DBGCAM, DBGCAL
None
Read: Anytime. See Table 6-24 for visible register encoding.
Write: If DBG not armed. See Table 6-24 for visible register encoding.
Table 6-25. DBGXAH Field Descriptions
Field
Description
1–0
Bit[17:16]
Comparator Address High Compare Bits — The Comparator address high compare bits control whether the
selected comparator compares the address bus bits [17:16] to a logic one or logic zero.
0 Compare corresponding address bit to a logic zero
1 Compare corresponding address bit to a logic one
6.3.2.8.3 Debug Comparator Address Mid Register (DBGXAM)
Address: 0x002A
R
W
Reset
7
Bit 15
0
6
Bit 14
0
5
Bit 13
0
4
Bit 12
0
3
Bit 11
0
2
Bit 10
0
1
Bit 9
0
0
Bit 8
0
Figure 6-17. Debug Comparator Address Mid Register (DBGXAM)
Read: Anytime. See Table 6-24 for visible register encoding.
Write: If DBG not armed. See Table 6-24 for visible register encoding.
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Freescale Semiconductor
201