MC9S12HY64 Datasheet, PDF (287/792 Pages) Freescale Semiconductor, Inc – S12 Microcontrollers

Analog-to-Digital Converter (ADC12B8CV1) Block Description
8.3.2 Register Descriptions
This section describes in address order all the ADC12B8C registers and their individual bits.
8.3.2.1 ATD Control Register 0 (ATDCTL0)
Writes to this register will abort current conversion sequence.
Module Base + 0x0000
R
W
Reset
7
Reserved
0
Read: Anytime
6
5
4
3
2
0
0
0
WRAP3
WRAP2
0
0
0
1
1
= Unimplemented or Reserved
Figure 8-3. ATD Control Register 0 (ATDCTL0)
Write: Anytime, in special modes always write 0 to Reserved Bit 7.
Table 8-1. ATDCTL0 Field Descriptions
Field
Description
1
WRAP1
1
0
WRAP0
1
3-0
Wrap Around Channel Select Bits — These bits determine the channel for wrap around when doing
WRAP[3-0] multi-channel conversions. The coding is summarized in Table 8-2.
Table 8-2. Multi-Channel Wrap Around Coding
WRAP3 WRAP2 WRAP1 WRAP0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
Multiple Channel Conversions (MULT = 1)
Wraparound to AN0 after Converting
Reserved¹
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN7
AN7
AN7
AN7
AN7
AN7
AN7
AN7
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Freescale Semiconductor
287